patent · US10573913B2
System and method for converting chemical energy into electrical energy using nano-engineered porous network materials
25 February 2020
Page 1 — bibliographic record
(12 )Gidwani
Unitedet States
Patent ( 10 ) Patent No.: US 10,573,913 B2
(54 ) SYSTEM AND METHOD FOR CONVERTING (58 ) Field of Classification Search CHEMICAL ENERGY INTO ELECTRICAL CPC HO1M 8/10 ; HO1M 4/8605; HO1M 4/8647 ; ENERGY USING NANO - ENGINEERED HO1M 4/8652; HOTM 4/8657 ; POROUS NETWORK MATERIALS (Continued ) (71) Applicant: QUSWAMI, INC ., San Francisco , CA (56 ) References Cited
(72) Inventors: Jawahar Gidwani, San Francisco , CA 3,483,040 A 12/1969 Parkins (US); Arash Hazeghi, San Francisco , 3,510,797 A 5/1970 Nieuwpoort CA (US ); Andrew Lam , San Francisco , (Continued )
CA (US ); Attila Horvath , Berkeley,
CA (US ) FOREIGN PATENT DOCUMENTS (73 ) Assignee : QUSWAMI, INC ., San Francisco , CA DE 1230509 B 12/1966 (US ) EP 0713089 5/1996
(Continued ) ( * ) Notice : Subject to any disclaimer , the term of this patent is extended or adjusted under 35 OTHER PUBLICATIONS
Achermann , M.et al., Carrier dynamics around nano -scale Schottky (21) Appl. No .: 15 /130,386 contact; a femtosecond near- field study, Applied Surface Science
( 22 ) Filed : Apr. 15 , 2016 (Continued ) (65 ) Prior Publication Data Primary Examiner Gary D Harris US 2016/0248098 A1 Aug. 25, 2016 (74 ) Attorney , Agent, or Firm — Arnold & Porter Kaye Scholer
Related U.S. Application Data ( 57 ) ABSTRACT (63) Continuation of application No. 13 /945,864, filed on An energy conversion device for conversion of chemical Jul. 18 , 2013, now Pat. No. 9,437,892. energy into electricity. The energy conversion device has a (Continued ) first and second electrode. A substrate is present that has a porous semiconductor or dielectric layer placed thereover.
(51) Int. CI. The porous semiconductor or dielectric layer can be a HOIM 8/10 ( 2016.01) nano - engineered structure . A porous catalyst material is B82Y 30/00 ( 2011.01) placed on at least a portion of the porous semiconductor or (Continued ) dielectric layer such that at least some of the porous catalyst (52) J.S. Cl. material enters the nano- engineered structure of the porous ??? semiconductor or dielectric layer, thereby forming an inter
(Continued ) 37 Claims, 12 Drawing Sheets
Bottom Electrode -8.35

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Related U.S. Application Data 5,780,727 A 7/1998 Gimzewski et al .
(60 ) Provisional application No. 61/676,285 , filed on Jul. 5,917,195 A 6/1999 Brown
26 , 2012, provisional application No. 61/712,712 , 5,955,772 A 9/1999 Shakouri et al. filed on Oct. 11 , 2012, provisional application No. 5,999,547 A 12/1999 Schneider et al. 61/716,889, filed on Oct. 22, 2012 , provisional 6,067,309 A
5/2000 Onomura et al .
7/2000 DiMatteo application No. 61/724,764, filed on Nov. 9 , 2012 . 6,114,620 A 9/2000 Zuppero et al. (51) Int. Cl. 6,119,651 A 9/2000 Anderson
HOIM 4/86 ( 2006.01 ) 6,172,427 B1 1/2001 Shinohara et al. HOIM 14/00 (2006.01) 6,218,608 B1 4/2001 Zuppero et al. HOIM 8/1004 ( 2016.01) 6,222,116 B1 4/2001 Zuppero et al. HOIM 8/22 (2006.01 ) 6,232,546 B1 5/2001 DiMatteo et al.
HOIM 4/90 ( 2006.01) 6,251,687 B1 6/2001 Buechler et al. HOIM 4/92 ( 2006.01 ) 6,268,560 B1 7/2001 Zuppero et al. (52) U.S. CI. 6,312,914 B1 11/2001 Kardos et al. CPC HOTM 4/8626 ( 2013.01); HOIM 4/8647 6,323,414 B1 11/2001 Shakouri et al.
(2013.01 ); HOTM 4/8652 (2013.01 ); HOLM 6,396,191 B1 5/2002 Hagelstein et al. 4/8657 (2013.01 ); HOTM 8/1004 ( 2013.01); 6,399,397 B1 6/2002 Zarling et al. HOLM 14/00 ( 2013.01 ); HOIM 4/9025 6,403,874 B1 6/2002 Shakouri et al. (2013.01); HOIM 4/92 (2013.01); HOIM 4/925 6,444,476 B1 9/2002 Morgan
(2013.01) ; HOLM 8/22 (2013.01); HOTM 8/225 6,649,823 B2 11/2003 Zuppero et al. ( 2013.01 ); YO2E 60/50 ( 2013.01 ) 6,678,305 B1 1/2004 Zuppero et al. ( 58 ) Field of Classification Search 6,700,056 B2 3/2004 Zuppero et al. CPC HO1M 14/00 ; HO1M 8/22; HO1M 8/225 ; 6,903,433 B1 6/2005 McFarland et al. HO1M 4/9025 ; HO1M 4/92 ; HO1M 4/925; 6,916,451 B1 7/2005 Zuppero et al.
B82Y 30/00 ; YO2E 60/50 7,057,213 B2 6/2006 McFarland et al . USPC 429/479 7,109,408 B2 9/2006 Kucherov et al. See application file for complete search history. 7,119,272 B2 10/2006 Zuppero et al.
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Office Action dated Apr. 30 , 2013, U.S. Appl. No. 13/ 336,529. Pocius, Alphonsus V .; “ Adhesion” entry from Kirk - Othmer Ency clopedia of Chemical Technology. John Wiley and Sons; Mar. 15 ,
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SYSTEM AND METHOD FOR CONVERTING device. FIG . 1 -C depicts a forward biased Schottky diode CHEMICAL ENERGY INTO ELECTRICAL whose positive terminal is a conductor/metal.
ENERGY USING NANO - ENGINEERED
POROUS NETWORK MATERIALS SUMMARY
CROSS -REFERENCE TO RELATED The present patent document describes various embodi APPLICATIONS ments having novel three dimensional device structures that can be on a planar two-dimensional substrate or on a
This application is a continuation of U.S. patent applica three - dimensional substrate. The various embodiments tion Ser. No. 13 /945,864 filed Jul. 18, 2013. Priority to this 10 improve on earlier solid state electric generators by increas patent application is expressly claimed , and the disclosure ing amount of power (i.e., electricity ) that can be produced thereof is hereby incorporated herein by reference in its per unit of two-dimensional area of a device . The novel entirety. This application claims the benefit of Provisional device structures described herein have solid -state junctions . Application Nos .61/676,285 filed Jul. 26 , 2012, 61 / 712,712 These device structures comprise porous semiconductor or filed Oct. 11, 2012, 61/716,889 filed Oct. 22 , 2012, and 15 dielectrics and nano -clusters of conductor and/or catalyst to 61 /724,764 filed Nov. 9 , 2012. Priority to these provisional form the solid -state junctions. Even though there are voids applications is expressly claimed , and the disclosures of the in the composite system , different porous semiconductor / provisional applications are hereby incorporated herein by catalyst materials , as an example, can be an integrated reference in their entirety . 20 system or the materials may be physically connected as a FIELD network . Nano -clusters are when materials form nano - sized clusters. The solid -state junctions can be , but are not limited
This patent document relates generally to energy conver to , Schottky diodes or p -n junctions. Also disclosed are sion systems and more particularly relates to a method and methods/processes to fabricate the disclosed device struc system for converting chemical energy into electrical power 25 tures, specifically for converting chemical energy directly using solid - state electric generators using planar or three into electrical potential to produce power. dimensional surfaces that comprise porous material net An energy conversion device for conversion of chemical works such as a nano -wire arrays or nano -engineered struc energy into electricity is disclosed . A first aspect of the tures, or nano -particles, or colloidal paste . energy conversion device comprises a first electrode con 30 nected to a substrate. A porous semiconductor (or dielectric )
BACKGROUND layer is disposed over the substrate ( with an optional non porous semiconductor (or dielectric ) layer being in -between
The use of solid stat electric generators convert the substrate on the porous semiconductor (or dielectric ) chemical energy into electricity has recently been demon layer . A porous catalyst material is located on at least a strated , as explained , for example , in U.S.Pat. Nos. 6,268 , 35 portion of the porous semiconductor (or dielectric) layer. At 560 , 6,649,823 , 7,371,962, and 7,663,053. U.S. Pat. Nos. least some of the porous catalyst material enters the nano 6,268,560 , 6,649,823 , 7,371,962, and 7,663,053 are hereby engineered structure of the porous semiconductor layer, incorporated herein by reference in their entirety . Such which forms an intertwining region . A second electrode is energy conversion devices efficiently convert chemical present, and an electrical potential is formed between the energy to electricity . For example , FIG . 1 herein illustrates 40 first electrode and a second electrode during chemical reac a solid state electric generator along with graphs showing tions between a fuel, the porous catalyst material, and the characteristics of such a device . As shown in cross section porous semiconductor network .
in FIG . 1- A herein , a charge carrier , usually an electron e , In another aspect disclosed herein , the substrate of the is energized on or near a conducting surface 10A by an energy conversion device is patterned to create a three energizer 12A . The charge carrier is energized, for example , 45 dimensional surface, thereby providing increased surface by chemical reactions . In each case the charge carrier is area for chemical reactions.
injected into a semiconductor conduction band. For In another aspect disclosed herein , the substrate of the example , the charge carrier ballistically moves from a con energy conversion device is patterned such that nano -wires ductor 10A into a semiconductor or dielectric 11A . The are formed .
conductor 10A is so thin that the electron effectively travels 50 In another aspect disclosed herein , the substrate of the through it ballistically, without losing energy or colliding energy conversion device is textured such that peaks and with another electron or atom . Since an energy offset exists valleys are formed .
between the semiconductor conduction band and the Fermi In another aspect disclosed herein , the energy conversion level of the catalyst, the result is a voltage 14A across device has a non -porous semiconductor layer in between the positive terminal 17A and negative terminal 16A . In FIG . 55 substrate and the porous semiconductor layer. 1- A , the dielectric junction 15A is a semiconductor junction specifically chosen to create an electrical potential voltage BRIEF DESCRIPTION OF THE DRAWINGS barrier which tends to impede the electron ballistic motion , shown as 11B in FIG . 1 - B . FIG . 1 - B shows the electrical The accompanying drawings, which are included as part potential in the device as a function of distance along the 60 of the present specification , illustrate various embodiments device at zero bias . and together with the general description given above and The potential voltage barrier can be formed in any one of the detailed description of the embodiments given below many ways, for example, a Schottky barrier as shown in serve to explain and teach the principles described herein . FIG . 1 -C , a p -n junction in FIG . 1- D , or a conductor FIG . 1 - A illustrates a solid - state electric generator. dielectric -conductor junction , FIG . 1- E . The dielectric is 65 FIG . 1- B illustrates a graph of potential energy versus electrically conductive . A forward biased diode provides one distance from the device's topmost surface and indicating of the simplestmethods to implement this energy converting the effect of a potential barrier in a solid -state junction .

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FIG . 1 -C illustrates a graph of potential versus distance covered with a porous semiconductor or dielectric layer / from the device's topmost surface in an exemplary solid network that intertwines with a porous catalyst layer/net state electric generator having a Schottky barrier. work three-dimensionally . An optional non -porous layer can FIG . 1- D illustrates a graph of potential versus distance also be inserted between the three - dimensional substrates from the device's topmost surface in an exemplary solid- 5 and the three -dimensional catalyzed porous semiconductor state electric generator having a p -n junction potential or dielectric layer/network .
barrier . FIG . 9b is a microscopic image of a cross section of an FIG . 1- E illustrates a graph of potential versus distance exemplary three -dimensional energy converter on a three from the device's topmost surface in an exemplary solid dimensional textured substrate as in FIG . 9a . state electric generator having a conductor-dielectric -con- 10 FIG . 9c is a microscopic image of a top view of an ductor potential barrier. exemplary three -dimensional energy converter on a three FIG . 2 illustrates the energy band diagram for a catalyst dimensional textured substrate as in FIG . 9a . semiconductor interface The above and other preferred features described herein , FIG . 3 illustrates the schematics of EMF generation including various novel details of implementation and com mechanism 15 bination of elements, will now be more particularly FIG . 4 illustrates a schematic cross -section of a portion of described with reference to the accompanying drawings and a nanowire material array with a catalyst network . pointed out in the claims. It will be understood that the FIG . 5a depicts a cross-sectional view of a three -dimen particular methods and apparatuses are shown by way of sional porous network which consists of a porous catalyst illustration only and not as limitations of the claims. As will three -dimensional layer that intertwines three-dimensionally 20 be understood by those skilled in the art , the principles and with another porous semiconductor or dielectric three -di features of the teachings herein may be employed in various mensional layer on a planar two- dimensional substrate . A and numerous embodiments without departing from the non -porous interlayer can optionally be inserted between the scope of the claims.
planar substrate and the porous three -dimensional layers/ networks above . 25 DETAILED DESCRIPTION FIGS. 5b is a cross -sectional microscopic view of a three -dimensional porous network which consists of a A method and apparatus for converting chemical energy porous catalyst three -dimensional layer that intertwines into electricity is described. Each of the features and teach three -dimensionally with another porous semiconductor or ings disclosed herein can be utilized separately or in con dielectric three-dimensional layer. 30 junction with other features and teachings. Representative FIGS. 5c is a top microscopic image of an energy con examples utilizing many of these additional features and verter having a three -dimensional porous network which teachings, both separately and in combination , are described consists of a porous catalyst three - dimensional layer that in further detail with reference to the attached drawings. intertwines three -dimensionally with another porous semi This detailed description is merely intended to teach a conductor or dielectric three - dimensional layer. 35 person of skill in the art further details for practicing FIG . 6 shows an energy converter having a multi-cell preferred aspects of the present teachings and is not intended device structure with multiple layers of three -dimensional to limit the scope of the claims. Therefore , combinations of porous catalyst and three-dimensional porous semiconduc features disclosed in the following detailed description may tor or dielectric networks on a planar substrate. A non not be necessary to practice the teachings in the broadest porous interlayer can be inserted or not between the planar 40 sense , and are instead taught merely to describe particularly two -dimensional substrate and the porous three -dimensional representative examples of the present teachings. layers /networks above . In the following description , for purposes of explanation FIG . 7 shows an exemplary energy converter having a only , specific nomenclature is set forth to provide a thorough patterned three-dimensional network of porous catalyst and understanding of the various embodiments described herein . porous semiconductor or dielectric on a three -dimensional 45 However, it will be apparent to one skilled in the art that substrates , in which the internal and external surfaces are these specific details are not required to practice the con covered with a porous semiconductor or dielectric layer / cepts described herein .
network that intertwines with a porous catalyst layer/net Moreover, the various features of the representative work three -dimensionally . An optional non -porous layer can examples and the dependent claimsmay be combined in also be inserted between the three -dimensional substrates 50 ways that are not specifically and explicitly enumerated in and the three -dimensional catalyzed porous semiconductor order to provide additional useful embodiments of the or dielectric layer/network . present teachings. It is also expressly noted that all value FIG . 8 shows an exemplary energy converter having ranges or indications of groups of entities disclose every three -dimensional porous substrate /supporting layer (par possible intermediate value or intermediate entity for the tially or fully ) network of porous catalyst and porous semi- 55 purpose of original disclosure , as well as for the purpose of conductor or dielectric on a three - dimensional substrates , in restricting the claimed subject matter. It is also expressly which the internal and external surfaces are covered with a noted that the dimensions and the shapes of the components porous semiconductor or dielectric layer/network that inter shown in the figures are designed to help to understand how twines with a porous catalyst layer/network three -dimen the present teachings are practiced ,but not intended to limit sionally. An optional non -porous layer can also be inserted 60 the dimensions and the shapes shown in the examples. between the three - dimensional substrates and the three Device structures and methods/processes described dimensional catalyzed porous semiconductor or dielectric herein , for example , in FIGS. 4-9 , include but are not limited layer/ network . to : (a ) nanowires, nanofibers , or nanotubes; (b ) porous FIG . 9a shows an exemplary energy converter having a nano -engineered structures with interconnecting walls and textured three -dimensional network of porous catalyst and 65 pores; and (c) porous nano -engineered structures with per porous semiconductor or dielectric on a three -dimensional colating networks. Fabrication methods/processes include substrates , in which the internal and external surfaces are but are not limited to direct film growth resulting in porous

Page 23
structures or/and nano -engineered structures. Methods of vapor deposition (CVD ); sputtering; evaporation ; atomic fabricating such devices include but are not limited to (i) layer deposition (ALD ); or solgel processes . stain oxidation and etching; ( ii ) dry and /or wet oxidation and Turning to FIG . 2 , a mechanism for energy conversion is etching ; (iii ) electrochemical oxidation and etching; (iv ) described . FIG . 2 depicts an energy band diagram 200 for a anodization oxidation and etching ; (v ) micro - arc oxidation 5 catalyst-nanowire interface for an energy conversion device. and etching ; nano -particles of semiconductor (s), dielectric Fuel plus oxidizer 205 comes into contact with the catalyst 210 , which oxidizes upon contact. The oxidized fuel 210 (s ), metal (s), catalyst(s ), metal salts in solvents, pastes , or injects electrons 240 into the conduction band 220 of the colloids; and (vi) solgel processes. For certain semiconduc semiconductor 215. There, the electrons 240 encounter a tors and dielectrics, e.g., silicon , only etching is required for Schottky -like potential barrier 225 between the semiconduc all these fabrication methods/ processes to introduce porosity 10 tor 215 and the catalyst 210 , which may be a conductor, and and nano - engineered structures in the materials. may also be a top electrode layer (not shown ) that embeds In certain embodiments , a chemical energy conversion the catalyst . The electrons 240 are then directed towards the device is described that utilizes porous semiconductor or bottom contact (not shown) by the built-in electric field at dielectric and porous catalyst integrated one unit /network 15 the interface between
the catalyst 210 and the semiconductor a planar two -dimensional substrate or a three -dimensional 215. The electrons 240 travel in the external circuit (not substrate . A porous thin film of dielectric or semiconductor, shown), thereby transferring their energy to the load before such as a titanium dioxide ( TiO2), which is sometimes returning to the catalyst site via the top contact ( also not referred to as titanium oxide, semiconducting network , can shown ). The electrons 240 then complete the reaction by be fabricated by depositing a thin film of metallic titanium 20 reducing the oxidized reactants producing the final products. ( Ti ) on a non -porous planar substrate such as silicon , or on The output voltage of the circuit shown in FIG . 2 will a non -porous supporting layer deposited on a planar sub depend on the potential offset (barrier ) between the Fermi strate, such as a non -porous TiO2 layer on silicon . This level in the catalyst and the conduction band of the semi deposited thin metallic Ti film can subsequently be oxidized conductor.
to create TiO2 and further modified to form nano -porous 25 Alternatively , the semiconductor/catalyst surface may holes in its microstructure through (i) stain oxidation and favor one of the oxidation or reduction reactions, effectively etching, ( ii) dry or wet oxidation and etching , ( iii) electro splitting the two reactions . This can create an electro chemical oxidation and etching, (iv ) anodization oxidation chemicalpotential gradientbetween the catalyst site and the and etching , or (v ) microarc oxidation and etching. Chemi semiconductor surface , which can induce an electro -motive cal reagents involved in all these processes include but are 30 force (EMF) in an external circuit and drive a load as shown not limited to hydrofluoric acid (HF), nitric acid (HNO3), in FIG . 3. In other words, as schematically shown in FIG . 3 , sulfuric acid (H2SO4), hydrogen peroxide (H2O2), or/and the oxidation -reduction (redox) reactions induce an elec sodium hydroxide (NaOH ). An additional non- porous layer tron's chemical potential difference between the catalyst ofmaterial functioning as a barrier layer can also be inserted sites and the semiconductor sites, which in turn gives rise to between the deposited metallic Ti thin film and the planar 35 an EMF (Au = V2 - V ).
substrate in order to further enhance device electrical per The various embodiments described herein are chemical formance. In another example the substrate itself can be a energy conversion devices that convert chemical energy to three - dimensional structure such as but not limited to porous electricity. A limiting factor of prior devices using similar silicon , textured silicon surfaces, and patterned silicon electron transportmechanisms as those described herein was wafers . Likewise an additional non -porous thin layer of 40 the rate at which catalytic reactions could take place . Elec semiconductor or dielectric such as TiO2 may be inserted tricity generation ofchemical energy converter devices like between the metallic Ti layer and the three -dimensional those described herein is proportional to the reaction rate substrate described above . and fuel conversion , and the reaction rate and fuel conver Although the various embodiments disclosed herein are sion are proportional to at least (i) the temperature at which described as using TiO2, wherever TiO2, is discussed, other 45 the catalytic reactions take place, and ( ii ) the total surface materials such as thin films of porous semiconductors and areas of the catalyst. Increasing the surface area, however, dielectrics with nano -engineered structures can be used generally leads to devices that become large two-dimension without departing from the teachings herein . Such other ally, and thus increases the size of the device, which is thin - film porous materials include but are not limited to undesirable . Likewise , temperatures can be increased to silicon ; Al2O3; GaN ; GaAs ; Ge; silica ; carbon ; oxides of 50 enhance reaction rate, but increasing temperature can also be niobium , tantalum , zirconium , cerium , tin , and vanadium . undesirable . The various embodiments described herein These materials also apply to the underneath planar and overcome these problems by increasing the surface area of three -dimensional substrates or supporting layers . The same the chemical energy converter device without significantly processing methods can also be used in device fabrications . increasing the two -dimensional area of such devices. As will be discussed , catalysts and / or conductors are 55 FIG . 4 illustrates an embodiment of a chemical energy placed on the internal and external surfaces of the porous converter device 400. In particular, FIG . 4 illustrates a semiconductor to create a plurality ( and preferably , and large device having nanowires 415 , which are formed on a sub number ) of solid state junctions . The catalysts and / or con strate layer (not shown ), where the substrate layer can ductors that can be used to form the solid -state junctions comprise a porous thin film of dielectric or semiconductor, with the porous nano -engineered semiconductor or dielec- 60 such as a titanium oxide ( TiO2). The substrate layer is tric network (s ) can be noble metals such as but are not formed on an electrode 410 , which can be made with a metal limited to Pt, Au , or Pd . These conductors and /or catalysts conductive material or highly n -doped semiconductormate can be deposited using a number of methods, including but rial. Electrode 410 can be below the substrate layer or not limited to using nanoparticles or/and metal salts in in - between the substrate and the nanowires 415.Nanowires solvents , pastes, or colloids; thin film deposition followed by 65 415 can comprise either a nano -engineered porous semicon annealing to nucleate the formation of nano -particles or a ductor material or a nano -engineered porous dielectric . combination ofpastes/solvent/deposition methods; chemical Either way, nanowires 415 form an electrically conductive

Page 24
array. Catalyst material 420 is on the surface of the nanowire Likewise, the three -dimensionalporous catalyst layer 505 415 , although intervening materials are possible aswell. The can comprise porous networks, individual nano -clusters / catalyst material 420 can be platinum particles , where each particles, or a combination of both , and can be constructed platinum particle forms a Schottky diode junction with the from , for example, platinum . As with porous semiconductor semiconductor material forming the nanowires 415. In use , 5 or dielectric layer 515 , catalyst layer can take the form of a fuel or energy source 430 such as hydrogen , or methanol or honeycomb - like structure . An exemplary three -dimensional natural gas, and air , or a monopropellant energy source or porous layer 505 can be seen in the photographs of FIGS. fuel such as hydrogen peroxide comes in contact with the 56-50. A feature of the intertwining region 510 is its large catalyst 420 , which causes electrons from the catalyst 420 to internal surface area where catalysts can be distributed be injected into the semiconductor 405 , which are then 10 throughout to construct a three -dimensional network of attracted to the electrode 410. This generates electricity. A catalyst- semiconductor junctions. An exemplary intertwin second electrode 425 is formed over the catalyst 420, which , ing region 510 can be seen in the photographs of FIGS. in conjunction with the bottom electrode 410 allow a circuit 5b -5c.
to be formed so that electrical current will flow and a voltage Chemical energy converter 500 can optionally include a potential V out is generated between the electrodes. 15 non -porous semiconductor or dielectric layer 520 deposited Nanowires 415 provide several advantages that improve through standard deposition methods such as evaporation , the overall efficiency. The first advantage is increased sur chemical vapor deposition (CVD ), sputtering , or atomic face area , which is provided by both the use of a porous layer deposition (ALD ), to provide a barrier layer between substrate 405 and nanowires 415. Porous three -dimensional the substrate below and the porous materials above. structures have a high surface to volume ratio when com- 20 In the embodiment illustrated by FIG . 5 , a top electrode pared to non -porous two- dimensional planar layers . In addi 530 can be formed on part or all of catalyst layer 505 . tion , the nanowires 415 themselves have surface area , mean Likewise, a bottom electrode 535 can be formed underneath ing that each nanowire 415 provides significantly more planar substrate 520. These two electrodes can be electri surface area than the same two -dimensional area would have cally connected to an external load to form a complete provided were no nanowire 415 present. The additional 25 circuit .
surface area provided by the porous substrate 405 and the FIG . 6 shows yet another embodiment, where a plurality nanowires will have the ability to have more catalyst mate of chemical energy converter devices 500 as in FIG . 5 (a ) are rial disposed thereon , especially when compared to energy arranged as n cells 602a-602n and are thus stacked on top of conversion devices that are two-dimensional. This is each other. A chemical energy converter 600 as shown in because presence of catalyst nano -particles, nano-clusters , 30 FIG . 6 is a multi-cell device structure with multiple layers of or nano-wires on such a porous substrate provides more porous catalyst 605a -605n and porous semiconductor/di reaction sites for chemical reactions leading to increased electric networks 615a -615n that can be fabricated and reaction rate at lower temperatures. Another advantage is integrated vertically on a planar two -dimensional substrate. that porous network also facilitates diffusion of reactants to In particular, chemical energy converter 600 can have a catalysts located on the internal surfaces of the nanowires 35 bottom electrode 635 , which has a planar substrate 625 and removal of reaction products away from the catalysts . disposed thereon . A non -porous semiconductor or dielectric In an embodiment, nanowires 415 are comprised of single layer 620 can , if desired , be placed on the planar substrate crystal TiO2 nanowires, which enhance electron transport, 625. Use of such a layer 620 acts as a barrier layer between can be synthesized in various simple inexpensive methods , substrate below and the porous materials above . The first such as growth from an epitaxial seed layer from a titanium 40 cell 602a of the chemical energy converter 600 comprises a source e.g. in a hydrothermal process. The bottom contact porous layer 615a comprised of a semiconductor or dielec 410 is a conductive substrate with conductive layer that tric material, which can be constructed , for example, from provides an epitaxial template for nanowire growth , e.g. TiO2. The first cell 602a also comprises a three -dimensional FTO ( fluorinated tin oxide ) in the case of TiO2 nanowires . porous catalyst layer 605a that is placed thereon using The top contact 425 has to electrically connect the porous 45 methods described above , and can comprise porous net network of the catalyst. The catalyst can be a paste or an works , individual nano -clusters/particles , or a combination electrolyte. Again , the conductor and or catalysts can be of both . Catalyst layer 605a can be constructed from , for deposited used nano -particle pastes, nano -particle solvents , example , platinum . At the interface between layer 615a and thin film depositions or any combinations thereof. catalyst layer 605a , the materials intertwine three -dimen FIG . 5a illustrates another embodiment of an energy 50 sionally in a first intertwined region 610a . converter device comprising a three-dimensional porous To increase the amount of energy generated , chemical catalyst layer 505 intertwined three -dimensionally with energy converter device 600 has additional cells 6026 porous semiconductor or dielectric layer 515 at an inter through 602n stacked on top of each other. For example, a twining region 510 , which in turn can be placed on a planar second cell 602b comprised of second porous layer 615b and substrate 525. Layer 515 can be constructed with TiO2 as 55 second catalyst layer 605b are formed above the first cell , discussed above , and can take the form of a honeycomb -like with a three -dimensional intertwined region 612a formed structure being either a nano -engineered structure having between the first cell 602a and second cell 602b . Likewise interconnecting walls defining pores, or nano -engineered a third three -dimensional intertwined region 610b is formed structures with percolating networks . Either way, the hon between the second catalyst layer 605b and second porous eycomb-like structure allows catalyst nano -particles from 60 semiconductor or dielectric layer 615b . the catalyst layer to enter the spaces of the honeycomb To further increase energy generation , n additional cells structure and rest on the surface of the semiconductor or 602n can be added to chemical energy converter 600. Each dielectric layer 515. It is this honeycomb structure that of the additional cells is comprised of n second catalyst makes layer 515 porous in three dimensions . These nano layers 605n and n porous semiconductor or dielectric layers particles can , for example , be platinum . The honeycomb- 65 615n , with a three-dimensional intertwined region 610n like structure of the semiconductor or dielectric layer 515 formed at every interface between catalyst layers 605n and can be seen in the photographs of FIGS . 56-5c. porous semiconductor or dielectric layer 615n . A three

Page 25
dimensional intertwined region 612a -612m will be formed Textured substrate 925 forms peaks and valleys, thereby between each cell. Such multi-cell structures significantly creating a three -dimensional reaction area . This three-di increase the total catalyst- semiconductor interfacial area mensional reaction area increases the surface area available without including a larger device , thereby increasing fuel for chemical reactions, which increases the number of conversion via chemical reactions and corresponding elec- 5 reactive sites that can take place during a particular amount trical output. of time for a given device size, thereby increasing the Yet another embodiment illustrated in FIG . 7 , in which a electrical generation capability of the energy converter 900 . chemical energy converter 700 has the integration of porous If desired , a non -porous layer 920 can be placed over the catalyst and porous semiconductor described in FIG . 5 textured substrate 905. As above , the non -porous layer 920 constructed on a three -dimensional surface . Such a three- 10 provides a barrier layer to separate the substrate below and dimensional surface has surface area larger than a planar the porous materials above. A porous or semiconductor or two -dimensional substrate , which results in increased fuel dielectric layer 915 is placed over the textured substrate 925 conversion and reaction rates , which in turn increases the ( or non -porous layer, if present).
amount of electricity generated. In particular, the embodi A catalyst layer 905 is placed over the porous semicon ment described with reference to FIG . 7 has a bottom 15 ductor/dielectric network 915 , which also enters the pores of electrode 735. A three -dimensional substrate 725 is fabri the porous semiconductor/dielectric network 915 to form an cated thereon using , for example, a standard lithography intertwining region 910. A second electrode 930 is placed patterning/etching process . In this embodiment substrate above a catalyst layer 905 , and in combination with first 725 forms a patterned three -dimensional network micro electrode 935 , allows a voltage to appear, and hence allows trenches 712. If desired , a non -porous layer 720 can be 20 for the use of the electricity generated by the converter placed over the patterned substrate 725 , which acts as a device 900 .
barrier layer between the substrate below and the porous As in the other embodiments described herein , the use of materials above. As in the embodiment shown in FIG . 5 , a a textured substrate 905 results in an increased surface area porous semiconductor/dielectric network 715 is placed over for catalysis, which results in greater electricity generation patterned substrate 725 (or non -porous layer 720 , if present). 25 than an energy converter having a planar two -dimensional A catalyst layer 705 is placed over the porous semiconduc substrate .
tor /dielectric network 715 , which also enters the pores of the FIG . 9b is a photograph depicting an energy converter as porous semiconductor/dielectric network 715 to form an in FIG . 9a having a textured substrate . The photograph intertwining region 710. A second electrode 730 is placed shows substrate 925 having a semiconductor or dielectric above a catalyst layer 705 , and in combination with first 30 layer 915 formed thereon . Catalyst layer 905 in the form of electrode 735 , allows a voltage to appear, and hence allows nano -particles is over the dielectric /semiconductor layer for the use of the electricity generated by the converter 915 , and nano -particles enter the pores of layer 915 to form device 700 . an intertwining region . FIG . 9c shows a planar view , where FIG . 8 shows an embodiment of a chemical energy one can see the texture of the dielectric/semiconductor layer converter 800 comprising a porous three -dimensional sub- 35 915 .
strate /supporting layer 825 where internal and external sur Device structures, and methods/processes to fabricate faces are covered with the integration of a porous semicon them , using nanowire arrays, nano-engineered structures, to ductor or dielectric layer 815 and a porous catalyst 805 form porous networks comprising solid -state junctions spe similar to that described in FIG . 5. In particular , chemical cifically to convert chemical into electrical energy are energy converter device 800 has a bottom electrode 835 , 40 described herein . The device structures can be fabricated on upon which a porous substrate /supporting layer 825 is a two -dimensional planar substrate or on a three -dimen placed thereon . sional substrate . An exemplary method comprises fabricat A second electrode 830 is placed above layer 825 , and in ing one or more solid -state electric generators . The solid combination with first electrode 835 , allows a voltage to state electric generators include one ormore chosen from the appear, and hence allows for the use of the electricity 45 group including a chemically energized solid -state electric generated by the converter device 800 . generator. A solid state electric generator energizes charge Three -dimensional porous substrate is typically amor carriers in a first material forming a junction with a second phous, which , upon annealing can crystallize . Nano -engi material. The second material has a finite energy gap with a neered structures typically consist of interconnected walls conduction band that has an offset with the Fermi level of the and wires forming a highly porous structure . The size of the 50 first material.
pores, the thickness of the porous layer, among other physi The present methods, devices and systems improve the cal and electrical properties, can be tuned by the processing energy conversion efficiency of junctions used in solid -state parameters. devices to generate electricity . An energy source injects Another method to create a nano -engineered porous net charge carriers , e.g. electrons, on one side of a junction . work or layer of semiconductor or dielectric , for example 55 When a net excess of charge carriers is injected from one TiO2, as a support to the catalyst above it, is to utilize a paste side of a junction to the other , it will be forced to travel in of TiO2 nano-particles to form thin films of porous layers/ the external circuit by the electric field . The result is the networks. conversion of chemical energy into the useful form of an FIG . 9a shows an embodiment having a three - dimen electrical energy. An element of the embodiments is that the sional textured substrate /supporting layer 925 where the 60 efficiency of this process is improved when the charge surface is covered with the integration of porous semicon transport or mobility is improved in the semiconducting ductor or dielectric material layer 915 and porous catalyst material.
905 like the embodiment described in FIG . 5. In particular, An alternative mechanism for generating power is creat the chemical energy converter 900 illustrated in FIG . 9 has ing an electrochemical potential difference between the a bottom electrode 935. Placed thereon is a three -dimen- 65 nanowire network or nano -engineered porous networks/ sional textured substrate 925 , which for example can be layers and the catalyst which can act as an electromotive created by etching a silicon wafer. force (EMF ). The semiconductor/catalyst surface may favor

Page 26
one of the oxidation or reduction reactions, effectively 1,three- Epoxy - Propane - Oxetane and Tri-Methylene -Ox splitting the two reactions . This can create an electro ide= 1,three-Methylene- Oxide CH (CH ) CH2O chemical potential gradient between the catalyst site and the Epoxy -Propane CH2-( CH2)-CH2O semiconductor surface which can induce an electro -motive Acetylene, C H2 force ( EMF) in an external circuit and drive a load . 5 Diacetylene = 1 ,three -Butadiyne One embodiment includes nanowire array or nano-engi 1 ,three -Butadiene CH2= CH - CH = CH2, neered porous networks /layers made from dielectric or semi Less Exotic High Energy Fuels:
conductor including but not limited to , for example , rutile Di- Ethyl- Ether or surgical ether TiO2, anatase TiO2, poly -crystalline TiO2 porous TiO2, Acetone = Di-Methyl-Ketone
ZrO2, SrTiO3, BaTiO3, Sr_x - Ba_y - TiO_z , LiNiO , silicon , 10 Less Exotic , Volatile Fuels :
SiC ; GaN ; GaAs; Ge; silica ; carbon ; oxides of niobium , Cyclo - Propane tantalum , zirconium , cerium , tin , vanadium , and LaSrV03, Cyclo -Butane and certain organic semiconductors, such as PTCDA , or Hydrocarbons such asmethane, propane, butane, pentane , 3,4,9,10 -perylenetetracarboxylicacid -dianhydride. The sub etc.
scripts x , y and z denote concentrations , per usual conven- 15 Other Storable Fuels :
tions. One advantage of SrTiO3 is that Schottky barriers on Methyl Formate HCOO C2H , it may be unpinned , providing a relatively larger barrier Formamide HCO_NH, compared to that of TiO2. N ,N , -Di-Methyl-Formamide HCON- (CH3)2 Fuels, Oxidizers , Autocatalysts, Stimulators Ethylene -Diamine H2N - CH2 CH2 - NH2 The various chemical energy converter devices described 20 Ethylene Glycol herein use storable reactants including oxidizers , autocata 1,4 -Dioxane = bimolecular cyclic ether of Ethylene Glycol lytic reaction accelerators, decelerators, and monopropel Paraldehyde (CH2CHO ), cyclic trimer of Acetaldehyde lants . The liquid phase , such as liquid hydrogen peroxide Powerful Oxidizer :
H2O2 at standard pressure and temperature , are convenient Tetra -Nitro -Methane, C (NO2)4 · .. does not spontane because their heat of vaporization is used as coolant and the 25 ously decompose ... just pass the two separate vapors liquid is conveniently storable . Monopropellants such as over the reaction surface of the cell in the gas phase H2O2 and monomethylhydrazine (MMH ) are similarly con Hydrogen Peroxide H202 venient and energize the active surface of converters. Auto Low Initiation Energy Mixtures: catalytic accelerators include monopropellants such as Cyclo -Propane with Oxygen = surgical anesthetic , micro H2O2 30 joules initiator
One embodiment uses reactions and reactants to energize Hypergolics :
these excitations. The reactions, reactants and additives UDMH = Unsymmetrical DiMethyl Hydrazine = 1,1 -Dim include at least monopropellants , high energy fuels with ethyl Hydrazine (CH3)2NNH , oxidizers , hypergolic mixtures, and additives and combina UDMH is hypergolic usually with N204 and is a very tions of reactants known to produce autocatalytic specie , 35 potent carcinogen reactants chosen to accelerate reactions or to control reac MMH MonoMethyl Hydrazine (CH )HNNH , hypergolic tions, and combinations thereof. The reactants and / or addi with any oxidizers, e.g. N204 tives include but are not limited to the following reactants: Corrosive Toxic Energetic Monopropellant: Energetic Fuels More Storable than Ammonia : Hydrazine = H2NNH , decomposed easily with a catalyst amine substituted ammonias 40 (usually Pt or Pd or Molybdenum Oxide Di-Methyl- Amine (CH3)2NH Hydrazine Hydrate
Tri-Methyl- Amine (CH2)2N Although various embodiments have been described with Mono - Ethyl-Amine (C2H5)NH2 respect to specific examples and subsystems, it will be Di-Ethyl-Amine (CH3)2NH ) apparent to those of ordinary skill in the art that the concepts Other Classes More Easily Storable: 45 disclosed herein are not limited to these specific examples or Methanol, CH OH subsystems but extends to other embodiments as well . Ethanol, EtOH CH3CH2OH Included within the scope of these concepts are all of these Formic Acid , HCOOH other embodiments as specified in the claims that follow . diesel fuels We claim :
gasoline 50 1. An energy conversion device for conversion of chemi alcohols cal energy into electricity, comprising : slurries including solid fuels a first electrode ;
Carbon Suboxide, C302, CO = C = CO , a substrate connected to said first electrode; Formaldehyde HCHO , a porous semiconductor layer disposed over said sub Paraformaldehyde , = better HCHO )n, sublimeable to 55 strate , said porous semiconductor layer having a nano Formaldehyde gas. (Potentially a cell coolant at the engineered structure;
same time). a porous catalyst material on at least a portion of said Less Storable Fuels : porous semiconductor layer that contacts a fuel and an Carbon Monoxide oxidizer, wherein at least some of the porous catalyst Hydrogen 60 material enters the nano -engineered structure of the Ammonia NH3 porous semiconductor layer to form an intertwining Energetic Fuels Containing Nitrogen : region , the porous catalyst material and the porous Nitromethane , CH NO2 semiconductor layer forming solid -state junctions, Nitromethane “ cut” with Methanol=model airplane “ glow wherein the solid -state junctions are p -n junctions; and plug" engine fuel 65 a second electrode, wherein electrons from the porous High Energy Fuels with Wide Fuel/air Ratio : catalystmaterial are injected into the porous semicon Epoxy- Ethane , Oxirane or Ethylene -Oxide CH2-CH2O ductor layer, and wherein an electrical potential is

Page 27
formed between the first electrode and a second elec the porous semiconductor layer forming solid -state trode during chemical reactions between the fuel and junctions, wherein the solid - state junctions are conduc oxidizer in contact with the porous catalyst material. tor- dielectric -conductor junctions; and 2. The energy conversion device of claim 1, wherein the a second electrode, wherein electrons from the porous substrate is patterned to create a three -dimensional surface , 5 catalyst material are injected into the porous semicon thereby providing increased surface area for chemical reac ductor layer, and wherein an electrical potential is tions . formed between the first electrode and a second elec 3. The energy conversion device of claim 2 , wherein the trode during chemical reactions between a fuel , the substrate is patterned such that nano -wires are formed . porous catalystmaterial and the porous semiconductor 4. The energy conversion device of claim 2 , wherein the 10 20.network
The
energy conversion device of claim 19 , wherein substrate is textured such thatpeaks and valleys are formed . the substrate is patterned to create a three-dimensional 5. The energy conversion device of claim 1, further surface, thereby providing increased surface area for chemi comprising a non -porous semiconductor layer is in between cal reactions.
the substrate and the porous semiconductor layer.
6. The energy conversion device of claim 1, wherein the 15 the21. The energy conversion device of claim 20, wherein substrate is patterned such that nano -wires are formed .
porous catalyst layer is formed with nano -particles.
7. The energy conversion device of claim 1 wherein the the22.substrate
The energy conversion device of claim 20 , wherein is textured such that peaks and valleys are porous catalyst layer is formed with nano -clusters .
8. The energy conversion device of claim 1, wherein the 20 formed .
23. The energy conversion device of claim 19 , further porous catalyst layer is formed with nano-wires.
9. The energy conversion device of claim 1, wherein the comprising the substrate a non -porous semiconductor layer is in between and the porous semiconductor layer.
porous semiconductor layer is formed with nano -particles .
10. The energy conversion device of claim 1 wherein the the24. The energy conversion device of claim 19 , wherein porous catalyst layer is formed with nano -particles.
porous semiconductor layer is formed with nano -clusters .
11. The energy conversion device of claim 1, wherein the 25 porousThe 25. energy conversion device of claim 19 wherein the catalyst layer is formed with nano -clusters.
porous semiconductor layer is formed with nano-wires .
12. The energy conversion device of claim 1, wherein the the26. The energy conversion device of claim 19 , wherein porous catalyst layer is formed with nano -wires.
porous semiconductor layer is a porous nano -engineered 27. The energy conversion device of claim 19 , wherein structure with percolating networks .
13. The energy conversion device of claim 1, wherein the 30 the porous semiconductor layer is formed with nano -par ticles .
porous semiconductor layer comprises a dielectric. 28. The energy conversion device of claim 19 wherein the 14. The energy conversion device of claim 13 , wherein porous semiconductor layer is formed with nano -clusters . the dielectric is a porous nano -engineered structure with 29. The energy conversion device of claim 19 , wherein percolating networks.
15. The energy conversion device of claim 13 , wherein 35 the porous semiconductor layer is formed with nano -wires . 30. The energy conversion device of claim 19 , wherein the dielectric is formed with nano -particles .
16. The energy conversion device of claim 13 wherein the the porous semiconductor layer is a porous nano -engineered structure with percolating networks .
dielectric is formed with nano -clusters .
17. The energy conversion device of claim 13 , wherein 40 the31.porous
The energy conversion device of claim 19 , wherein semiconductor layer comprises a dielectric .
the dielectric is formed with the nano -wires .
18. The energy conversion device of claim 1 , where the 32. The energy conversion device of claim 31 , wherein nanowire array or nano -engineered porous networks/layers the dielectric is a porous nano -engineered structure with are chosen from a group including rutile TiO2, anatase TiO2, percolating networks .
33. The energy conversion device of claim 31, wherein poly -crystalline TiO2 porous TiO2, ZrO2 , SrTiO3, BaTiO3,
Sr_x-Ba_y- TiO_z, LiNio , silicon , Sic , Gan, GaAs, Ge, 45 the34.dielectric is formed
The energy with device conversion nano-particles of claim . 31 wherein the silica , carbon , oxides of niobium , tantalum , zirconium , dielectric is formed with nano - clusters . cerium , tin , vanadium , and LaSrVO3, and certain organic 35. The energy conversion device of claim 31, wherein semiconductors , such as PTCDA, or 3,4,9,10 -perylenetet racarboxylicacid - dianhydride . the dielectric is formed with the nano -wires . 36. The energy conversion device of claim 19 , where the 19. An energy conversion device for conversion of chemi- 50 nanowire cal energy into electricity, comprising: array or nano -engineered porous networks/ layers a first electrode ; are chosen from a group including rutile TiO2, anatase TiO2, a substrate connected to said first electrode; poly -crystalline TiO2 porous TiO2, ZrO2, SrTiO3, BaTiO3 , a porous semiconductor layer disposed over said sub Sr_x -Ba_y - TiO_z , LiNiO , silicon , SiC , GAN , GaAs, Ge, strate, said porous semiconductor layer having a nano- 55 cerium silica, ,carbon , oxides of niobium , tantalum , zirconium , tin , vanadium , and LaSrVO3, and certain organic engineered structure; semiconductors, such as PTCDA , or 3,4,9,10 -perylenetet a porous catalyst material on at least a portion of said racarboxylicacid -dianhydride. porous semiconductor layer, wherein at least some of 37. The energy conversation device of claim 1, wherein the porous catalyst material enters the nano -engineered structure of the porous semiconductor layer to form an 60 the fuel and the oxidizer comprise a monopropellant. intertwining region , the porous catalyst material and

Provenance
- Collection
- Patents citing this work
- Original assignee
- QuSwami Inc
- Pages
- 27
- Method
- pdftotext (the PDF's own text layer) + pdftoppm 300dpi page scans
- Patent office record
- patents.google.com →
- Source
- Google Patents citing-documents table
- Inventors
- Jawahar Gidwani; Arash Hazeghi; Andrew Lam; Attila Horvath; QuSwami Inc
- Published
- 2020-02-25
- Transcribed from
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