WFC VIC
Started by unknown · · 434 posts · last reply 2 May 2014
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#276 ·
Here are some prototype pics of the 5 coil VIC bobbins that I had made today. I used AutoCAD to draw them up and then transferred the drawing to a 3D printer which made them out of ABS Plastic. It took about 8 hours for these to be made.
Looks really cool! Doesn't matter to me how long it takes to make the bobbins, it took me 3 days to glue mine, nice ones.
Would you share that CAD file here on the forum?
What core material did you use in those bobbins?
Br,
Webmug -
#277 ·
Nice work Tony,
Thanks for the file btw
hm -
#278 ·
Compliments tony.
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#279 · date not recorded
Thanks guys, they did turn out really nice. The cores are made of powder iron. Here are the measurements of the bobbins.
(http://www.globalkast.com/images/tonywoodside/5coilVIC_bobbin_measurements.png) -
#280 · date not recorded
I've almost go the VIC Circuit together and ready for testing. Here's a pic of the PLL, Scanning, Pulse Indicator and Gated Pulse Generator circuits.
(http://www.globalkast.com/images/tonywoodside/VIC_Circuit.jpg) -
#281 ·
Here are some images of the 5 coil VIC that I made along with the cores. I just need to order the wire and wrap the coils now. Hopefully I'll have this done by the time I finish up the circuit.
(http://www.globalkast.com/images/tonywoodside/SDC10825.JPG)
(http://www.globalkast.com/images/tonywoodside/SDC10826.JPG)
(http://www.globalkast.com/images/tonywoodside/SDC10827.JPG)
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#282 · date not recorded
@Tony
Nice work on the pcb's and VIC bobbins!
I'm very curious how that flat iron powder core is going to preform when pulsed...
I'm searching for iron powder plate/rod material/core, don't want to make one with powder myself.
br,
Webmug -
#283 · date not recorded
very nice work tony !
are the cores custoum made?
I think that figs.2,3,6,11,12 are all part of the GMS unit(dashboard box)
I am trieng to figure out what the A26 chip of the "gated pulse frequency generator" (fig6) might be. Any ideas ?
hydrogenmask
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#284 · date not recorded
Yea I referred to this is an earlier post about the VIC. Look at the excerpt from one his Patent 92007861 below. He's basically saying the Sec. = 10X Primary and the same for the chokes and then he's just combining them and saying 30:1 step-up.
(http://www.globalkast.com/images/stanmeyer/patent_92007861.PNG)
Tony did you noticed that he is talking about secondary to choke ratio and not primary to secondary?
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#285 · date not recorded
very nice work tony !
are the cores custoum made?
I think that figs.2,3,6,11,12 are all part of the GMS unit(dashboard box)
I am trieng to figure out what the A26 chip of the "gated pulse frequency generator" (fig6) might be. Any ideas ?
hydrogenmask
Yea the IC for the "Gated Pulse Frequency Generator" is a 74122 =) -
#286 · date not recorded
that is fast as a reply!
rettigerable monostable multivibrator
I`m still confused how to connect this thing up!
I will appreciate if you can help me out Tony
HMattachment_6880 wo92-6.jpg
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#287 · date not recorded
I've edited your schematic and added the pin numbers.
(http://www.globalkast.com/images/stanmeyer/wo92-6.jpg) -
#288 ·
very nice work tony !
are the cores custoum made?
I think that figs.2,3,6,11,12 are all part of the GMS unit(dashboard box)
I am trieng to figure out what the A26 chip of the "gated pulse frequency generator" (fig6) might be. Any ideas ?
hydrogenmask
Yea the IC for the "Gated Pulse Frequency Generator" is a 74122 =)
Have you seen the circuits inside the dashboard GMS unit?
DOnt think the 74122 is correct its most likely a 555
also the schematic is wrong, those "AND" logic pairs should actually be XNORS it was drawn wrong... but in all actuality thesse can be omitted
because theres no real need for them and the capacitor between wont allow them to work
i believe this was some patent misdirection to keep the technology protected
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#289 ·
No I've never seen any of the circuits in the GMS. It's definitely not a 555, for one he shows in the schematic that there are 10 connections, a 555 only has 8 pins. The reason for the logic gates and the capacitor are to convert the duty cycles of the incoming puts to a very short pulse duty cycle to be used as a trigger for the 74122 chip. Once I finish putting this circuit together, I will show u guys what I'm talking about.
(http://www.globalkast.com/images/tonywoodside/fig6_trigger.PNG) -
#290 ·
No I've never seen any of the circuits in the GMS. It's definitely not a 555, for one he shows in the schematic that there are 10 connections, a 555 only has 8 pins. The reason for the logic gates and the capacitor are to convert the duty cycles of the incoming puts to a very short pulse duty cycle to be used as a trigger for the 74122 chip. Once I finish putting this circuit together, I will show u guys what I'm talking about.
@ Tony:
Thanks for being understanding...ive been trying to figure this control circuit out for a year or more...
heres a question to consider based on the diagram attached...
If Fig. (12 or 9xB) is the clock that times the whole circuit... that goes to point "G"
Point "G" is the Figure 2 "GAS PEDAL" mechanical PWM
Stans design used a variable duty cycle to provide more or less hydroxy gas based on throttle position
point "G" becomes a 10% - 90% duty cycle at a given clock frequency which is sent to TWO outputs ( M & M1 )
"M" goes on the top side of the VIC through fig 3 & 4 to create a variable voltage which is adjustable to provide a minimum idle speed at the low end and a maximum 12 volts at the passing speed / full throttle / 90% duty cycle setting
"M1" goes to the bottom side through figure 6 and on to PLL / resonant scanner / pulse pickup / and the result goes to the bottom or "Ground" / "negative" side of the VIC coil through Fig 5
Here is the question... if the clock frequency at the input of figure2 is fixed and the pulse width is variable at the same clock frequency... wont the trigger from the NORs on fig6 stay at a fixed frequency regardless of the throttle position
therefore wont the gating be fixed?
I believe the gating of the signal going into or stepping on the PLL frequency needed to follow the figure 2 Pulse Width to provide a Hydrogen output range from idle to full W.O.T. ( wide open throttle)
SO the way i see it is this, there are 3 parameters at work in the system:
1. variable positive voltage tied to gas pedal from 1, 2, or 3 volts to 12 ( based on idle requirement) to top of coil
2. resonant frequency based on pulse pickup being generated and sent to figure 5 via PLL ( not controlled by figure 2)
3. additional gas output control based on variable GATING that "steps on " the PLL signal sent to figure 5 that is determined by Figure 2 PWM or throttle position
do i have the flow chart figured out correctly?
( see attached)
flow diagram.pdf
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#291 ·
ok let me see if I can answer these questions for ya. Fig. 12 generates the gate frequency, lets say 500 Hz @ 50% duty cycle, which is then sent to fig. 2 via input "G". The duty cycle of this frequency will then be varied from 10% - 90% depending on the W.O.T. and rotation speed of the Distributor LED pickups. All these combined will determine the amount of voltage being applied to the Primary coil. This same frequency from fig. 12 will be sent to fig. 6 via input "B" or from fig. 2 via input "M1". This 500 Hz frequency's duty cycle is then manually set between 10% - 90% duty cycle independent of fig. 2. This variable gated pulse is then input into the PLL circuit via pin 5 through the two NOR gates and if you notice at the 2nd NOR gate u have the resonant frequency being NORed will the gate pulse. The PLL will output the the resonant frequency at pin 4 which is then routed back through pin 3 and into the 2nd NOR gate. The truth table for a NOR gate shows that you will get a HIGH only when both inputs are LOW. So the longer the gate pulse time is off, the more resonant pulses you will get into pin 5 via the NOR gate. This resonant frequency is steadily being match with the frequency from the feedback which is sent into the PLL via pin 14. Hope this helped answer some of your questions. I will try to draw up a logical output for the circuit and post it on here sometime this week. -
#292 ·
Eccelent general explanation, tony.
Yesterday I had some time to examin the circuit board pictures.
1/ What I`v noticed as Dynadon pointed out was that there is another 741 connected in parallel with the A25(741) of fig4. however still there is no extra connection for the input of the extra opamp!( extra J input if you like). pin 3 seems to be connected to a 47k and then to Vdd.
2/ fig7 4017 dividers are not connected ok, but how and were pll pin 4 is connected to pin 5 I cannot locate. were is it?
HM
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#293 · date not recorded
Eccelent general explanation, tony.
Yesterday I had some time to examin the circuit board pictures.
1/ What I`v noticed as Dynadon pointed out was that there is another 741 connected in parallel with the A25(741) of fig4. however still there is no extra connection for the input of the extra opamp!( extra J input if you like). pin 3 seems to be connected to a 47k and then to Vdd.
2/ fig7 4017 dividers are not connected ok, but how and were pll pin 4 is connected to pin 5 I cannot locate. were is it?
HM
here is a circuit to work with for the VIC CARD for multisim 11, many of the traces have been figured out but not 100% yet
please contribute and re-post !
thanksVIC CARD.ms11
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#294 · date not recorded
hydrogenmask,pin 3 of the PLL 4046 is the comparator in pin.That signal comes right from the negative side of the primary coil through a 22k resistor.Thats the small blue jumper wire on the front of the VIC board.It also goes to the ANL/FREQ switch on the front panel,and then that signal goes to the BNC test connector for scope reading.
Pin 4 goes into G on the cell driver circuit,and pin 5 is the inhibit input from the 4001 from the Gate Pulse circuit A.
Pin 4 and 5 are not connected together anywhere.If someone shows it that way,their wrong.
The 4017's are not used.
Don -
#295 · date not recorded
this is what i came up with as the op amp side of the circuit
(http://i82.photobucket.com/albums/j243/outlawstc/water%20fuel%20tech/opampsschematic.jpg) -
#296 · date not recorded
hydrogenmask,pin 3 of the PLL 4046 is the comparator in pin.That signal comes right from the negative side of the primary coil through a 22k resistor.Thats the small blue jumper wire on the front of the VIC board.It also goes to the ANL/FREQ switch on the front panel,and then that signal goes to the BNC test connector for scope reading.
Pin 4 goes into G on the cell driver circuit,and pin 5 is the inhibit input from the 4001 from the Gate Pulse circuit A.
Pin 4 and 5 are not connected together anywhere.If someone shows it that way,their wrong.
The 4017's are not used.
Don
sorry Don, I made a mistake in my post I meant connection between pin3 and pin4 not pin5.
should they be connected to each other?
to pin 3 I see the following:
I see a blue wire (1st to the left going to the first 10k resistor of the ''cell driver circuit'')
Then I also can see another blue wire that may be also connected but not shown clear (right one connected to the 22k and small cap) shown in pic below.
Can you confirm Don?
HMattachment_6889 21032011078.jpg
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#297 · date not recorded
hydrogenmask,
Pins 3 and 4 of the 4046 are not connected to each other.
Pin 3 goes through a 22k resistor then hooks to the negative side of the primary coil,and does not go to ground like your drawing shows.The 22k resistor and the cap are not connected to each other either.The 22k resistor is just added on the board in a spot close to where it was needed.
Pin 4 of the 4046 goes to the input (G) of the cell driver circuit.
Thats just how I said it before.
Don -
#298 ·
Quotethis is what i came up with as the op amp side of the circuit
Top pin 1 in = ? signal, don't know what signal this one is
Top pin 2 in = + 5 volts in not connected to pin 3
Top pin 3 in = Battery +12 volts in, not connected to trace on board
Bottom pin 1 in = + 12 volts
Bottom pin 2 in = J input
Bottom pin 3 & 4 in = Ground
Don -
#299 ·
if you look at this pic where i have the bottom traces overlaying the top traces u can see that pin 3 of the 4046 is going to two locations. on the topside its going to the 10k resistor of the driver circuit and then splits to one output of the card and also to the base of the first transistor. Pin 3's bottom trace goes to pin 8 of the 4001 down by the scanning circuit and which is then NORed with another signal which is connected by a wire connected to the pin 9 then this signal comes out of pin 10 and then back up to pin 5 of the 4046.
(http://www.globalkast.com/images/stanmeyer/VIC_Card_com-side_with_Trace.PNG) -
#300 ·
Hi Don, Tony
Forget about my last post I had another mistake there as well.
I took another close look at the PCB. please look carefully at those 2 pics so to see exactly what is going to were!
attachment_6892 attachment_6894 PLL investigation.bmp PLL investigation2.bmp