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Stan’s Legacy

Figure (3-12)

Acceleration Control

Also written Diode Holder

How it is written

  • (3-12)

Drawings 5

On this figure 2

Where it is named · 8

Acceleration Control Circuit (30)

  1. … tical circuit (8xx) and/ or (8xxx) or to (8n) since the triggered low logic state (12) of Figure (3-7) and (3-8) moves in direct relationship to the displaced light-gate (9), as illustrated in Figure (3-12).

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  2. Figure (3-12)

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  3. … 7) by linearly moving (forward and/or reverse direction) "low" logic state signal (12) in a array of "high" logic state output signals (13a xxx 13n), as further illustrated in Figure (3-8) and Figure (3-12).

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  4. Figure (3-12)

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  5. As signal output (15) of figure (4) (14a xxx ... 12 ... xx14n) is being received by acceleration control circuit (30) of Figure (3-5) as to Figure (3-12), circuit (30) converts incoming time-response signal (14a xxx ... 12 ... xx14n) into a variable time-base unipolar pulse (16), as shown in Figure (3-8).

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  6. The sweeping action of the scanning circuit (30) always starts from position (9a) and moves point (8ax) to point (8axxx) of Figure (3-9) (3-12) until logic-point (12) is detected.

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  7. Circuit (30) continues to increase pulse width (17axxxx) of Figure (3-8) as the monitored (detected by < scanning) toggling-time (14a xxxx ... 12) increases when logic-point (12) moves farther away from start-position (9a) to stop-position (9n), as further shown in Figure (3-13) as to Figure (3-12).

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  8. Figure (3-12)

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