design note · Voltage Intensifier Circuit · computed
VIC design session v17: reasoning
Lab notebook, VIC sweep — L held at 0.1mH, widening tube gap to raise C_eff.
Result: all 64 candidates cluster at f_r = 326.8kHz, roughly 5x above my 40-70kHz target. Raising C_eff alone (via 9mm rod/13mm tube geometry) got C_eff to only 1.19nF — nowhere near enough to pull resonance down with L stuck at 0.1mH. The math is unforgiving: f_r = 1/(2π√LC) needs C_eff up around 15-20nF at this L to land in-band, and geometry widening on a single 100mm cell just can't get there without either a much larger tube gap or stacking cells in parallel to multiply C_eff. Confirms what I suspected: holding L fixed and only playing the geometry lever is a dead end for this cell size.
Within the sweep, the trade-off is clean: thinner wire and fewer turns buys tank Q (26.2 at #1) at the cost of coil Q (251 vs 137 for #5) — but coil AC resistance stays low enough across the board that it's not the limiting factor yet. Displacement current is healthy at ~97% and breakdown margin is enormous (380-414x) at 2ppm, so I have huge headroom on the dielectric side — not spending it on frequency is wasteful.
Adopting #1 (80t/AWG20, 2 chokes) — best score, highest Q, lowest series R, and the design differences vs #2-5 are marginal compared to the frequency-band violation everyone shares.
Next session: stop fixing L. Sweep L upward (0.3-1mH) alongside multi-cell parallel stacking to raise C_eff faster, targeting f_r in 40-70kHz directly.
Basis
- Confidence
- 0.70
- Recorded
- Published
- 30 Aug 2026
- Device
- Voltage Intensifier Circuit
- Component
- choke
- Source Ref
- design session v17
- Notebook Id
- 1387
design-loop